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Ivy Bridge Lithography, Die Size – 22 nm process

The change in the manufacturing process from 32 nm to 22 nm will result in 47.3% reduction in die size. The math involved is simple. The 32 nm manufacturing process takes an area of 32 units by 32 units while the 22 nm process will take 22 units by 22 units for the same number of transistors.

The 22 nm process will therefore take 47.26% ( 22 x 22 x 100% / 32 x 32) space compared to the 32 nm process. If the transistor count would have been same, the 22 nm process Ivy Bridge would have produced twice the number of chips in a given wafer than the 32 nm process. This would give Intel an upper hand in reducing the cost and enable it to produce more number of chips from a single wafer. It will also give more competitive edge over AMD which would still be using the 32 nm for its Trinity chips.

The actual die size will however be not smaller as the transistor count in the Ivy Bridge increases to 1.4 billion from 1.16 billion is Sandy Bridge. This represent a 20.7% increase, and therefore, we expect a die size to be about 25% smaller than than the Sandy Bridge chip.

Here is a screen shot from a Chinese site which has actually got hold of the Ivy Bridge silicon and measured the die size. It is pretty much close to what we have calculated.

Related posts:

  1. Ivy Bridge Architecture
  2. Ivy Bridge Vs Sandy Bridge – 4K resolution
  3. TMSC 3D technology Vs Intel Tri Gate Process
  4. Sandy Bridge Vs Ivy Bridge
  5. Process of Manufacturing Silicon Chips

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